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Modification of RISC-V softcore processor Orca.
REHAD: Using Low-Frequency Reconfigurable Hardware for Cache Side-Channel Attacks Detection. Run on ML605 evaluation board with UART 115200.
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MATANA Implementation on Chipyard (Rocket-Chip RISC-V Softcore processor) on ML605 board
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Clone of https://git.openrobots.org/projects/robotpkg-wip with branches prepared for the CI of other projects
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Modèle de thèse initialement publié à git:redmine du LAAS. Télécharger et utiliser en locale (besoin latexmk + pdflatex je crois), ou en Overleaf. N'hésite pas à l'améliorer!
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Ethernet MAC 10/100Mbps IP (OpenCores) with AXI4 (Lite) interface.
Has Linux driver support.
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Linux Module for : 1) R/W mmio registers. 2) Context change send info. 3) Interrupts handler.
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Generate ROM with attacks for Rehad-Orca.
For synthesis, place mem.hex in ip/idram/src/input. [Request GCC cross compiler (RV32IM).] For bitsteam, replace BRAM content of myorca.bit. [Request Xilinx ISE setup and liscence.]Updated -
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