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MATANA Implementation on Chipyard (Rocket-Chip RISC-V Softcore processor) on ML605 board
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REHAD / Rehad-Orca
OtherModification of RISC-V softcore processor Orca.
REHAD: Using Low-Frequency Reconfigurable Hardware for Cache Side-Channel Attacks Detection. Run on ML605 evaluation board with UART 115200.
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Gepetto / Articles
BSD 2-Clause "Simplified" LicenseUpdated -
Humanoid Path Planner / hpp-doc
BSD Zero Clause LicenseUpdated -
radelin_thesis / openabe_opti
GNU Affero General Public License v3.0Updated -
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Guilhem Saurel / hpp-doc
BSD Zero Clause LicenseUpdated -
Silvano Dal Zilio / FMTVChallenge2015
Creative Commons Zero v1.0 UniversalUpdated -
Olivier Stasse / anf-2022-Transparents
BSD 3-Clause "New" or "Revised" LicenseUpdated -
Florent Lamiraux / gerard-bauzil
BSD 2-Clause "Simplified" License3D model of the Gerard Bauzil experimental room.
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Guilhem Saurel / hpp-template-corba
BSD 3-Clause "New" or "Revised" LicenseThis package is intended to ease construction of CORBA servers by templating actions that are common to all servers.
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Generate ROM with attacks for Rehad-Orca.
For synthesis, place mem.hex in ip/idram/src/input. [Request GCC cross compiler (RV32IM).] For bitsteam, replace BRAM content of myorca.bit. [Request Xilinx ISE setup and liscence.]Updated -
This is the official Low Side Synchronous Buck converter Gitlab
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