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Commit 7f090d3f authored by Jean Alinei's avatar Jean Alinei
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Rearranged the schematic for a 3 leg version using subsheets.

parent d676ee4a
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KiCAD_files/Power.kicad_dru 0 → 100644
View file @ 7f090d3f
(version 1)
(rule "clearance-to-1mm-cutout"
(constraint clearance (min 0.8mm))
(condition "A.Layer=='Edge.Cuts' && A.Thickness == 1.0mm"))
KiCAD_files/Power.kicad_pcb
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KiCAD_files/Power.kicad_pcb-bak
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KiCAD_files/Power.kicad_prl 0 → 100644
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{
"board": {
"active_layer": 0,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,
"zones": 0.6
},
"ratsnest_display_mode": 0,
"selection_filter": {
"dimensions": true,
"footprints": true,
"graphics": true,
"keepouts": true,
"lockedItems": true,
"otherItems": true,
"pads": true,
"text": true,
"tracks": true,
"vias": true,
"zones": true
},
"visible_items": [
0,
1,
2,
3,
4,
5,
8,
9,
10,
11,
12,
13,
14,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
32,
33,
34,
35,
36
],
"visible_layers": "0001020_ffffffff",
"zone_display_mode": 0
},
"meta": {
"filename": "Power.kicad_prl",
"version": 3
},
"project": {
"files": []
}
}
KiCAD_files/Power.kicad_pro 0 → 100644
View file @ 7f090d3f
{
"board": {
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 1.2,
"height": 2.4,
"width": 2.4
},
"silk_line_width": 0.12,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.15,
"silk_text_upright": false,
"zones": {
"45_degree_only": false,
"min_clearance": 0.0
}
},
"diff_pair_dimensions": [
{
"gap": 0.0,
"via_gap": 0.0,
"width": 0.0
}
],
"drc_exclusions": [],
"meta": {
"filename": "board_design_settings.json",
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"copper_edge_clearance": "error",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint_type_mismatch": "error",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "error",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zone_has_empty_net": "error",
"zones_intersect": "error"
},
"rule_severitieslegacy_courtyards_overlap": false,
"rule_severitieslegacy_no_courtyard_defined": false,
"rules": {
"allow_blind_buried_vias": false,
"allow_microvias": false,
"max_error": 0.005,
"min_clearance": 0.0,
"min_copper_edge_clearance": 0.024999999999999998,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_silk_clearance": 0.0,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.19999999999999998,
"min_via_annular_width": 0.049999999999999996,
"min_via_diameter": 0.39999999999999997,
"use_height_for_length_calcs": true
},
"track_widths": [
0.0,
1.0,
2.0,
3.0,
4.0
],
"via_dimensions": [
{
"diameter": 0.0,
"drill": 0.0
}
],
"zones_allow_external_fillets": false,
"zones_use_no_outline": true
},
"layer_presets": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
"pin_map": [
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
1,
0,
1,
2
],
[
0,
1,
0,
0,
0,
0,
1,
1,
2,
1,
1,
2
],
[
0,
0,
0,
0,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
2
],
[
1,
1,
1,
1,
1,
0,
1,
1,
1,
1,
1,
2
],
[
0,
0,
0,
1,
0,
0,
1,
0,
0,
0,
0,
2
],
[
0,
2,
1,
2,
0,
0,
1,
0,
2,
2,
2,
2
],
[
0,
2,
0,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
0,
2,
1,
1,
0,
0,
1,
0,
2,
0,
0,
2
],
[
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2,
2
]
],
"rule_severities": {
"bus_definition_conflict": "error",
"bus_entry_needed": "error",
"bus_label_syntax": "error",
"bus_to_bus_conflict": "error",
"bus_to_net_conflict": "error",
"different_unit_footprint": "error",
"different_unit_net": "error",
"duplicate_reference": "error",
"duplicate_sheet_names": "error",
"extra_units": "error",
"global_label_dangling": "warning",
"hier_label_mismatch": "error",
"label_dangling": "error",
"lib_symbol_issues": "warning",
"multiple_net_names": "warning",
"net_not_bus_member": "warning",
"no_connect_connected": "warning",
"no_connect_dangling": "warning",
"pin_not_connected": "error",
"pin_not_driven": "error",
"pin_to_pin": "warning",
"power_pin_not_driven": "error",
"similar_labels": "warning",
"unannotated": "error",
"unit_value_mismatch": "error",
"unresolved_variable": "error",
"wire_dangling": "error"
}
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "Power.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12.0,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25,
"via_diameter": 0.8,
"via_drill": 0.4,
"wire_width": 6.0
}
],
"meta": {
"version": 2
},
"net_colors": null
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "Power.net",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": "Title_block.kicad_wks"
},
"schematic": {
"annotate_start_num": 0,
"drawing": {
"default_line_thickness": 6.0,
"default_text_size": 50.0,
"field_names": [],
"intersheets_ref_own_page": false,
"intersheets_ref_prefix": "",
"intersheets_ref_short": false,
"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
"label_size_ratio": 0.25,
"pin_symbol_size": 25.0,
"text_offset_ratio": 0.08
},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
"version": 1
},
"net_format_name": "Pcbnew",
"ngspice": {
"fix_include_paths": true,
"fix_passive_vals": false,
"meta": {
"version": 0
},
"model_mode": 0,
"workbook_filename": ""
},
"page_layout_descr_file": "Title_block.kicad_wks",
"plot_directory": "C:/Users/amel-/OneDrive/Documents/stage/1-documentation/1leg/Definition_Package_Power/",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
"subpart_first_id": 65,
"subpart_id_separator": 0
},
"sheets": [
[
"8d0c1d66-35ef-4a53-a28f-436a11b54f42",
""
],
[
"b9592210-62fd-48e0-8447-67f645d7d247",
"Power Leg 1"
],
[
"fb2a6dc8-c34d-4aee-9ddb-1f58ee3a460f",
"Power Leg 2"
],
[
"c3edd47d-e7f6-4433-9222-763d5544c9ab",
"Power Leg 3"
]
],
"text_variables": {}
}
KiCAD_files/Power.kicad_sch 0 → 100644
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KiCAD_files/Power.sch
View file @ 7f090d3f
......@@ -269,7 +269,7 @@ AR Path="/5E86B783/5F2F867A" Ref="C?" Part="1"
AR Path="/5E99427A/5F2F867A" Ref="C29" Part="1"
F 0 "C11" H 9515 6471 50 0000 L CNN
F 1 "100nF" H 9515 6380 50 0000 L CNN
F 2 "Capacitor_SMD:C_1210_3225Metric" H 9438 6275 50 0001 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 9438 6275 50 0001 C CNN
F 3 "~" H 9400 6425 50 0001 C CNN
F 4 "1210PC104KAT1A" H 9400 6425 50 0001 C CNN "manf#"
1 9400 6425
......@@ -554,7 +554,7 @@ AR Path="/5E86B783/5F46146C" Ref="C?" Part="1"
AR Path="/5E99427A/5F46146C" Ref="C30" Part="1"
F 0 "C12" H 9515 9721 50 0000 L CNN
F 1 "100nF" H 9515 9630 50 0000 L CNN
F 2 "Capacitor_SMD:C_1210_3225Metric" H 9438 9525 50 0001 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 9438 9525 50 0001 C CNN
F 3 "~" H 9400 9675 50 0001 C CNN
F 4 "1210PC104KAT1A" H 9400 9675 50 0001 C CNN "manf#"
1 9400 9675
......@@ -3155,7 +3155,7 @@ AR Path="/5E86B783/6199A2E5" Ref="C?" Part="1"
AR Path="/5E99427A/6199A2E5" Ref="C?" Part="1"
F 0 "C40" H 9965 6471 50 0000 L CNN
F 1 "100nF" H 9965 6380 50 0000 L CNN
F 2 "Capacitor_SMD:C_1210_3225Metric" H 9888 6275 50 0001 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 9888 6275 50 0001 C CNN
F 3 "~" H 9850 6425 50 0001 C CNN
F 4 "1210PC104KAT1A" H 9850 6425 50 0001 C CNN "manf#"
1 9850 6425
......@@ -3187,7 +3187,7 @@ AR Path="/5E86B783/61C27FAC" Ref="C?" Part="1"
AR Path="/5E99427A/61C27FAC" Ref="C?" Part="1"
F 0 "C39" H 9990 9721 50 0000 L CNN
F 1 "100nF" H 9990 9630 50 0000 L CNN
F 2 "Capacitor_SMD:C_1210_3225Metric" H 9913 9525 50 0001 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 9913 9525 50 0001 C CNN
F 3 "~" H 9875 9675 50 0001 C CNN
F 4 "1210PC104KAT1A" H 9875 9675 50 0001 C CNN "manf#"
1 9875 9675
......@@ -3511,7 +3511,7 @@ AR Path="/5E86B783/626E5808" Ref="C?" Part="1"
AR Path="/5E99427A/626E5808" Ref="C?" Part="1"
F 0 "C48" H 9465 12921 50 0000 L CNN
F 1 "100nF" H 9465 12830 50 0000 L CNN
F 2 "Capacitor_SMD:C_1210_3225Metric" H 9388 12725 50 0001 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 9388 12725 50 0001 C CNN
F 3 "~" H 9350 12875 50 0001 C CNN
F 4 "1210PC104KAT1A" H 9350 12875 50 0001 C CNN "manf#"
1 9350 12875
......@@ -3751,7 +3751,7 @@ AR Path="/5E86B783/626E588A" Ref="C?" Part="1"
AR Path="/5E99427A/626E588A" Ref="C?" Part="1"
F 0 "C49" H 9940 12921 50 0000 L CNN
F 1 "100nF" H 9940 12830 50 0000 L CNN
F 2 "Capacitor_SMD:C_1210_3225Metric" H 9863 12725 50 0001 C CNN
F 2 "Capacitor_SMD:C_0805_2012Metric" H 9863 12725 50 0001 C CNN
F 3 "~" H 9825 12875 50 0001 C CNN
F 4 "1210PC104KAT1A" H 9825 12875 50 0001 C CNN "manf#"
1 9825 12875
......
KiCAD_files/PowerLeg1.kicad_sch 0 → 100644
View file @ 7f090d3f
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