Commit dc4148ef authored by Yuxiao Mao's avatar Yuxiao Mao
Browse files

Detection Fix: Prime atk8 use now atk8 signal, Slow Cycles count now use...

Detection Fix: Prime atk8 use now atk8 signal, Slow Cycles count now use isMonitoring signal, Regmap decrement will not count below 0
parent 76c12d3e
......@@ -299,7 +299,7 @@ class DetectPatternPrimeInternal(params: DetectPatternPrimeParams)(implicit mp:
RegmapUtil.countEvent(atk_prime_5, in.resetCounters, offset + 0x10, "AtkPrime5") ++
RegmapUtil.countEvent(atk_prime_6, in.resetCounters, offset + 0x14, "AtkPrime6") ++
RegmapUtil.countEvent(atk_prime_7, in.resetCounters, offset + 0x18, "AtkPrime7") ++
RegmapUtil.countEvent(atk_prime_7, in.resetCounters, offset + 0x1C, "AtkPrime8") ++
RegmapUtil.countEvent(atk_prime_8, in.resetCounters, offset + 0x1C, "AtkPrime8") ++
RegmapUtil.countEvent(atk_primeinst_1, in.resetCounters, offset + 0x30, "AtkPrimeInst1") ++
RegmapUtil.countEvent(atk_primeinst_2, in.resetCounters, offset + 0x34, "AtkPrimeInst2") ++
RegmapUtil.countEvent(atk_primeinst_3, in.resetCounters, offset + 0x38, "AtkPrimeInst3") ++
......
......@@ -193,7 +193,7 @@ class MatanaSlowDetectionImp(outer: MatanaSlowDetection, params: MatanaParams)
RegmapUtil.countEvent(pack_has_timer, resetCounters, 0x104, "PackTimer") ++
RegmapUtil.countEvent(pack_has_flush, resetCounters, 0x108, "PackFlushL1D") ++
RegmapUtil.countEvent(pack0.one_dmemaddr_valid, resetCounters, 0x10C, "DmemAddrValid") ++
RegmapUtil.countEvent(true.B, resetCounters, 0x110, "SlowCycle") ++
RegmapUtil.countEvent(isMonitoring, resetCounters, 0x110, "SlowCycle") ++
RegmapUtil.countEvent(pack_has_jalr, resetCounters, 0x114, "PackJalr") ++
RegmapUtil.countEvent(pack_has_jump, resetCounters, 0x118, "PackJump") ++
detectPatternTimer.regmap(0x200) ++
......
......@@ -13,7 +13,11 @@ class RegmapUtilCountEvent(regName: String)(implicit mp: MatanaParams) {
val in = Wire(new RegmapUtilCountEventIn())
val countEvent = RegInit(0.U(mp.counterWidth.W)).suggestName("count" + regName)
countEvent := Mux(in.reset, 0.U, Mux(in.decrement, countEvent - in.event, countEvent + in.event))
countEvent := Mux(in.reset,
0.U,
Mux(in.decrement && in.event,
Mux(countEvent >= 1.U, countEvent - in.event, 0.U), // decrement do not below 0
countEvent + in.event))
// max: track count evolution when decrement exists
val maxEvent = RegInit(0.U(mp.counterWidth.W)).suggestName("max" + regName)
......
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