Commit 0c21755f authored by Yuxiao Mao's avatar Yuxiao Mao
Browse files

DetectPrime: fix comment on counter description

parent c00419ed
......@@ -42,15 +42,15 @@ class DetectPatternPrimeInternal(params: DetectPatternPrimeParams)(implicit mp:
// Attack pattern
// Description: Multiples access to DCache, each time in different pages
// 1) diff tag c+1, same page c-1 (thresh 8)
// 2) diff tag c+1, same page c-1 (thresh 4)
// 3) diff page same set c+2, diff page diff set c+1, same page same set c-2, same page diff set c-1 (thresh 16)
// 4) diff page same set c+2, diff page diff set c+1, same page same set c-2, same page diff set c-1 (thresh 8)
// 5) diff page c+1, same page c-1 (thresh 4, if thresh then 0)
// 6) diff page c+1, same page c-2 (thresh 4)
// 7) diff page same set c+2, diff page diff set c+1, same page same set c-2, same page diff set c-1 (thresh 8, if thresh then 0)
// 8) diff page same set c+2, diff page diff set c+1, same page same set c-4, same page diff set c-2 (thresh 8)
// Description: Multiples access to DCache, each time in same set with differents tag
// 1) diff tag c+1, same tag c-1 (thresh 8)
// 2) diff tag c+1, same tag c-1 (thresh 4)
// 3) diff tag same set c+2, diff tag diff set c+1, same tag same set c-2, same tag diff set c-1 (thresh 16)
// 4) diff tag same set c+2, diff tag diff set c+1, same tag same set c-2, same tag diff set c-1 (thresh 8)
// 5) diff tag c+1, same tag c-1 (thresh 4, if thresh then 0)
// 6) diff tag c+1, same tag c-2 (thresh 4)
// 7) diff tag same set c+2, diff tag diff set c+1, same tag same set c-2, same tag diff set c-1 (thresh 8, if thresh then 0)
// 8) diff tag same set c+2, diff tag diff set c+1, same tag same set c-4, same tag diff set c-2 (thresh 8)
val countThresh1 = 8
val countThresh2 = 4
......@@ -80,7 +80,7 @@ class DetectPatternPrimeInternal(params: DetectPatternPrimeParams)(implicit mp:
// Update saved_dmem* array in FIFO way
when (in.dmemaddr_valid) {
when (saved_dmemtag.map(_ =/= dmemtag).reduce(_&&_)) { // new page
when (saved_dmemtag.map(_ =/= dmemtag).reduce(_&&_)) { // new tag
when (saved_dmemset.map(_ =/= dmemset).reduce(_&&_)) { // new set
// Update saved_dmemset, newer at 0
saved_dmemset.foldLeft(dmemset) { (data, last) =>
......@@ -108,7 +108,7 @@ class DetectPatternPrimeInternal(params: DetectPatternPrimeParams)(implicit mp:
count2 := Mux(count2 <= countThresh2.U - 1.U, count2 + 1.U, countThresh2.U)
count5 := Mux(count5 <= countThresh5.U - 1.U, count5 + 1.U, 1.U)
count6 := Mux(count6 <= countThresh6.U - 1.U, count6 + 1.U, countThresh6.U)
}.otherwise { // old page
}.otherwise { // old tag
when (saved_dmemset.map(_ =/= dmemtag).reduce(_&&_)) { // new set
// Update saved_dmemset, newer at 0
saved_dmemset.foldLeft(dmemset) { (data, last) =>
......
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